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board_same51.h
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1#ifndef SAME51_H
2#define SAME51_H
3#if defined(CORE_SAME51)
4
5#include "sam.h"
6
7/*
8***********************************************************************************************************
9* General
10*/
11 #define PORT_TYPE uint32_t //Size of the port variables (Eg inj1_pin_port). Most systems use a byte, but SAMD21 is a 32-bit unsigned int
12 #define BOARD_MAX_DIGITAL_PINS 54 //digital pins +1
13 #define BOARD_MAX_IO_PINS 58 //digital pins + analog channels + 1
14
15 //#define PORT_TYPE uint8_t //Size of the port variables (Eg inj1_pin_port).
16 #define PINMASK_TYPE uint8_t
17 #define COMPARE_TYPE uint16_t
18 #define COUNTER_TYPE uint16_t
19 #define SERIAL_BUFFER_SIZE 257 //Size of the serial buffer used by new comms protocol. Additional 1 byte is for flag
20 #define FPU_MAX_SIZE 32 //Size of the FPU buffer. 0 means no FPU.
21 #ifdef USE_SPI_EEPROM
22 #define EEPROM_LIB_H "src/SPIAsEEPROM/SPIAsEEPROM.h"
23 typedef uint16_t eeprom_address_t;
24 #include EEPROM_LIB_H
25 //SPIClass SPI_for_flash(1, 2, 3); //SPI1_MOSI, SPI1_MISO, SPI1_SCK
26 SPIClass SPI_for_flash = SPI; //SPI1_MOSI, SPI1_MISO, SPI1_SCK
27
28 //windbond W25Q16 SPI flash EEPROM emulation
29 EEPROM_Emulation_Config EmulatedEEPROMMconfig{255UL, 4096UL, 31, 0x00100000UL};
30 //Flash_SPI_Config SPIconfig{USE_SPI_EEPROM, SPI_for_flash};
31 SPI_EEPROM_Class EEPROM(EmulatedEEPROMMconfig, SPIconfig);
32 #else
33 //#define EEPROM_LIB_H <EEPROM.h>
34 #define EEPROM_LIB_H "src/FlashStorage/FlashAsEEPROM.h"
35 typedef uint16_t eeprom_address_t;
36 #endif
37 #define RTC_LIB_H "TimeLib.h"
38 void initBoard();
39 uint16_t freeRam();
40 void doSystemReset();
41 void jumpToBootloader();
42
43 #if defined(TIMER5_MICROS)
44 /*#define micros() (((timer5_overflow_count << 16) + TCNT5) * 4) */ //Fast version of micros() that uses the 4uS tick of timer5. See timers.ino for the overflow ISR of timer5
45 #define millis() (ms_counter) //Replaces the standard millis() function with this macro. It is both faster and more accurate. See timers.ino for its counter increment.
46 static inline unsigned long micros_safe(); //A version of micros() that is interrupt safe
47 #else
48 #define micros_safe() micros() //If the timer5 method is not used, the micros_safe() macro is simply an alias for the normal micros()
49 #endif
50 #define pinIsReserved(pin) ( ((pin) == 0) ) //Forbidden pins like USB on other boards
51
52 //Additional analog pins (These won't work without other changes)
53 #define PIN_A6 (8ul)
54 #define PIN_A7 (9ul)
55 #define PIN_A8 (10ul)
56 #define PIN_A9 (11ul)
57 #define PIN_A13 (9ul)
58 #define PIN_A14 (9ul)
59 #define PIN_A15 (9ul)
60
61 static const uint8_t A7 = PIN_A7;
62 static const uint8_t A8 = PIN_A8;
63 static const uint8_t A9 = PIN_A9;
64 static const uint8_t A13 = PIN_A13;
65 static const uint8_t A14 = PIN_A14;
66 static const uint8_t A15 = PIN_A15;
67
68/*
69***********************************************************************************************************
70* Schedules
71*/
72 //See : https://electronics.stackexchange.com/questions/325159/the-value-of-the-tcc-counter-on-an-atsam-controller-always-reads-as-zero
73 // SAME512 Timer channel list: https://user-images.githubusercontent.com/11770912/62131781-2e150b80-b31f-11e9-9970-9a6c2356a17c.png
74 #define FUEL1_COUNTER TCC0->COUNT.reg
75 #define FUEL2_COUNTER TCC0->COUNT.reg
76 #define FUEL3_COUNTER TCC0->COUNT.reg
77 #define FUEL4_COUNTER TCC0->COUNT.reg
78 //The below are NOT YET RIGHT!
79 #define FUEL5_COUNTER TCC1->COUNT.reg
80 #define FUEL6_COUNTER TCC1->COUNT.reg
81 #define FUEL7_COUNTER TCC1->COUNT.reg
82 #define FUEL8_COUNTER TCC1->COUNT.reg
83
84 #define IGN1_COUNTER TCC1->COUNT.reg
85 #define IGN2_COUNTER TCC1->COUNT.reg
86 #define IGN3_COUNTER TCC2->COUNT.reg
87 #define IGN4_COUNTER TCC2->COUNT.reg
88 //The below are NOT YET RIGHT!
89 #define IGN5_COUNTER TCC1->COUNT.reg
90 #define IGN6_COUNTER TCC1->COUNT.reg
91 #define IGN7_COUNTER TCC2->COUNT.reg
92 #define IGN8_COUNTER TCC2->COUNT.reg
93
94 #define FUEL1_COMPARE TCC0->CC[0].bit.CC
95 #define FUEL2_COMPARE TCC0->CC[1].bit.CC
96 #define FUEL3_COMPARE TCC0->CC[2].bit.CC
97 #define FUEL4_COMPARE TCC0->CC[3].bit.CC
98 //The below are NOT YET RIGHT!
99 #define FUEL5_COMPARE TCC1->CC[0].bit.CC
100 #define FUEL6_COMPARE TCC1->CC[1].bit.CC
101 #define FUEL7_COMPARE TCC1->CC[2].bit.CC
102 #define FUEL8_COMPARE TCC1->CC[3].bit.CC
103
104 #define IGN1_COMPARE TCC1->CC[0].bit.CC
105 #define IGN2_COMPARE TCC1->CC[1].bit.CC
106 #define IGN3_COMPARE TCC2->CC[0].bit.CC
107 #define IGN4_COMPARE TCC2->CC[1].bit.CC
108 //The below are NOT YET RIGHT!
109 #define IGN5_COMPARE TCC1->CC[0].bit.CC
110 #define IGN6_COMPARE TCC1->CC[1].bit.CC
111 #define IGN7_COMPARE TCC2->CC[0].bit.CC
112 #define IGN8_COMPARE TCC2->CC[1].bit.CC
113
114static inline void FUEL1_TIMER_ENABLE(void) { TCC0->INTENSET.bit.MC0 = 0x1; }
115static inline void FUEL2_TIMER_ENABLE(void) { TCC0->INTENSET.bit.MC1 = 0x1; }
116static inline void FUEL3_TIMER_ENABLE(void) { TCC0->INTENSET.bit.MC2 = 0x1; }
117static inline void FUEL4_TIMER_ENABLE(void) { TCC0->INTENSET.bit.MC3 = 0x1; }
118 //The below are NOT YET RIGHT!
119static inline void FUEL5_TIMER_ENABLE(void) { TCC0->INTENSET.bit.MC0 = 0x1; }
120static inline void FUEL6_TIMER_ENABLE(void) { TCC0->INTENSET.bit.MC1 = 0x1; }
121static inline void FUEL7_TIMER_ENABLE(void) { TCC0->INTENSET.bit.MC2 = 0x1; }
122static inline void FUEL8_TIMER_ENABLE(void) { TCC0->INTENSET.bit.MC3 = 0x1; }
123
124static inline void FUEL1_TIMER_DISABLE(void) { TCC0->INTENSET.bit.MC0 = 0x0; }
125static inline void FUEL2_TIMER_DISABLE(void) { TCC0->INTENSET.bit.MC0 = 0x0; }
126static inline void FUEL3_TIMER_DISABLE(void) { TCC0->INTENSET.bit.MC0 = 0x0; }
127static inline void FUEL4_TIMER_DISABLE(void) { TCC0->INTENSET.bit.MC0 = 0x0; }
128 //The below are NOT YET RIGHT!
129static inline void FUEL5_TIMER_DISABLE(void) { TCC0->INTENSET.bit.MC0 = 0x0; }
130static inline void FUEL6_TIMER_DISABLE(void) { TCC0->INTENSET.bit.MC0 = 0x0; }
131static inline void FUEL7_TIMER_DISABLE(void) { TCC0->INTENSET.bit.MC0 = 0x0; }
132static inline void FUEL9_TIMER_DISABLE(void) { TCC0->INTENSET.bit.MC0 = 0x0; }
133
134static inline void IGN1_TIMER_ENABLE(void) { TCC1->INTENSET.bit.MC0 = 0x1; }
135static inline void IGN2_TIMER_ENABLE(void) { TCC1->INTENSET.bit.MC1 = 0x1; }
136static inline void IGN3_TIMER_ENABLE(void) { TCC2->INTENSET.bit.MC0 = 0x1; }
137static inline void IGN4_TIMER_ENABLE(void) { TCC2->INTENSET.bit.MC1 = 0x1; }
138//The below are NOT YET RIGHT!
139static inline void IGN5_TIMER_ENABLE(void) { TCC1->INTENSET.bit.MC0 = 0x1; }
140static inline void IGN6_TIMER_ENABLE(void) { TCC1->INTENSET.bit.MC1 = 0x1; }
141static inline void IGN7_TIMER_ENABLE(void) { TCC2->INTENSET.bit.MC0 = 0x1; }
142static inline void IGN8_TIMER_ENABLE(void) { TCC2->INTENSET.bit.MC1 = 0x1; }
143
144static inline void IGN1_TIMER_DISABLE(void) { TCC1->INTENSET.bit.MC0 = 0x0; }
145static inline void IGN2_TIMER_DISABLE(void) { TCC1->INTENSET.bit.MC1 = 0x0; }
146static inline void IGN3_TIMER_DISABLE(void) { TCC2->INTENSET.bit.MC0 = 0x0; }
147static inline void IGN4_TIMER_DISABLE(void) { TCC2->INTENSET.bit.MC1 = 0x0; }
148//The below are NOT YET RIGHT!
149static inline void IGN5_TIMER_DISABLE(void) { TCC1->INTENSET.bit.MC0 = 0x0; }
150static inline void IGN6_TIMER_DISABLE(void) { TCC1->INTENSET.bit.MC1 = 0x0; }
151static inline void IGN7_TIMER_DISABLE(void) { TCC2->INTENSET.bit.MC0 = 0x0; }
152static inline void IGN8_TIMER_DISABLE(void) { TCC2->INTENSET.bit.MC1 = 0x0; }
153
154 #define MAX_TIMER_PERIOD 139808 // 2.13333333uS * 65535
155 #define MAX_TIMER_PERIOD_SLOW 139808
156 #define uS_TO_TIMER_COMPARE(uS) ((uS * 15) >> 5) //Converts a given number of uS into the required number of timer ticks until that time has passed.
157 //Hack compatibility with AVR timers that run at different speeds
158 #define uS_TO_TIMER_COMPARE_SLOW(uS) ((uS * 15) >> 5)
159
160/*
161***********************************************************************************************************
162* Auxiliaries
163*/
164 //Uses the 2nd TC
165 //The 2nd TC is referred to as TC4
166 #define ENABLE_BOOST_TIMER() TC4->COUNT16.INTENSET.bit.MC0 = 0x1 // Enable match interrupts on compare channel 0
167 #define DISABLE_BOOST_TIMER() TC4->COUNT16.INTENSET.bit.MC0 = 0x0
168
169 #define ENABLE_VVT_TIMER() TC4->COUNT16.INTENSET.bit.MC1 = 0x1
170 #define DISABLE_VVT_TIMER() TC4->COUNT16.INTENSET.bit.MC1 = 0x0
171
172 #define BOOST_TIMER_COMPARE TC4->COUNT16.CC[0].reg
173 #define BOOST_TIMER_COUNTER TC4->COUNT16.COUNT.bit.COUNT
174 #define VVT_TIMER_COMPARE TC4->COUNT16.CC[1].reg
175 #define VVT_TIMER_COUNTER TC4->COUNT16.COUNT.bit.COUNT
176
177/*
178***********************************************************************************************************
179* Idle
180*/
181 //3rd TC is aliased as TC5
182 #define IDLE_COUNTER TC5->COUNT16.COUNT.bit.COUNT
183 #define IDLE_COMPARE TC5->COUNT16.CC[0].reg
184
185 #define IDLE_TIMER_ENABLE() TC5->COUNT16.INTENSET.bit.MC0 = 0x1
186 #define IDLE_TIMER_DISABLE() TC5->COUNT16.INTENSET.bit.MC0 = 0x0
187
188/*
189***********************************************************************************************************
190* CAN / Second serial
191*/
192 Uart secondarySerial (&sercom3, 0, 1, SERCOM_RX_PAD_1, UART_TX_PAD_0);
193
194#endif //CORE_SAMD21
195#endif //SAMD21_H
secondarySerial
#define secondarySerial
Definition comms_secondary.h:15
rshift
static uint32_t rshift(uint32_t a)
Bitwise right shift - generic, unoptimized, case.
Definition bit_shifts.h:349
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